Making reference to relevant registers, describe the steps carried out by the CPU during a single Fetch-Decode-Execute cycle.

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The value/address in the Program Counter (PC) is copied into the Memory Address Register (MAR)...
...and the Program Counter (PC) increments by one.
The address currently stored in the MAR is sent along the address bus, so to request the data/instruction stored in that memory address.
The requested data/instruction is sent back to the CPU via the data bus and stored in the Memory Data Register (MDR).
The data / instruction is then copied into the Instruction Register (IR), where it is decoded.
Once decoded, the instruction / data is executed and the result of the execution is stored in the Accumulator (ACC).
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